When talking about high performance computing, people will easily think of the supercomputers such as BlueGene, Earth Simulator, etc. Such a high performance computing platform tends to provide extremely high throughput but not necessarily the highly deterministic response time, which is essential for real-time applications. One such typical application is the hardware-in-the-loop (HIL) simulation as shown below. The HIL simulation replaces the simulated/emulated hardware equipment under test with real one during the simulation process. However, to achieve high fidelity simulation results, the simulator kernel must be reactive and respond readily within the given time frame (usually determined by the sampling periods). The late computation result is as bad as a wrong result.
Using FPGAs instead of massive commodity processors in design of supercomputer has two unique advantages: First, it can exploit execution parallelism in the application below the instructions level that cannot be exploited by commodity processors; Second, it alleviates the unpredictable memory access problems associated with the memory hierarchy and cache cohesion control, and therefore can deliver highly deterministic computations. Our current research includes FPGA design and synthesis, algorithm optimization, advanced computer architecture exploration, real-time communication routing in multi-core systems, etc.