National Science Foundation (NSF), $201,000, 2010 – 2013
Investigator: Dr. Gang Quan (PI).
This project is in collaboration with Dr. Shangping Ren from the Illinois Institute of Technology.
The continued advancements in semiconductor technology make it possible to integrate hundreds processing cores into one silicon die. However, as the transistor size continues to shrink, the increasing manufacturing defects have resulted in severe yield loss and made chip products’ profit to drop substantially. Process variations also cause the performance and power characteristics differ significantly from chip to chip. This non-determinism greatly exacerbates the complexity of developing, validating, and maintaining software built upon these chips, especially for mission-critical real-time embedded applications. We believe that the architectural virtualization is an effective strategy and will be the norm to address the extensive process variations and manufacturing defect problems on many-core platforms. In this collaboration effort, we seek to develop effective methods and techniques to virtualize hardware resources on many-core platform and thus isolate the underlying hardware non-determinisms without changing the operating system and application software.